Analog Layout Engineer Your mission Join our team as an Analog Design & Layout Engineer. Develop cutting-edge analog blocks and ensure they meet industry standards. Your main responsibilities are: - Troubleshoot and apply solutions to facilitate the migration of existing designs to a new environment. - Create and optimize layouts for analog components like PLL, BG, LVDS, and IVREF, ensuring they meet specified requirements. - Conduct essential checks such as DRC, LVS, EM-IR, and other verifications to ensure the integrity of your designs. - Plan and execute top-level routing, considering various power domains and mixed-signal design challenges. - Perform final chip-level validations, including dummy fills and other sign-off checks, with the necessary reporting to prepare for tape-out. Your experience - Master's Degree in Electronics Engineering and proven experience in designing and integrating various analog blocks. - In-depth knowledge of layout design, particularly for TSMC16-12NM technology nodes. - Strong proficiency with EDA tools like Cadence, Synopsys or Altium. - Understanding of layout-dependent effects in deep submicron technology nodes. - Hands-on experience with the tape-out process on TSMC16-12NM nodes. Why join VeroTech? - A motivating salary package, with the possibility of working from home, a company car and other benefits. - Improve your skillset within challenging mid to long-term R&D projects in a variety of high tech industries. - Work in a people-oriented company where you will get to guide your own professional career, supported by our internal team. - Join an inspiring community of engineers with a range in expertise and experience levels.